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Abstract

A dual port, dual speed image memory interface is capable of controllably inputting or outputting medium speed serial data through a medium speed port at the same time that high speed serial imagery data is being supplied to or read from a high speed data rate port. Access to the medium speed port is through a mux/demux unit, which is coupled to receive imagery data at the medium data rate and controllably writes successive data signals, in parallel, into respective ones of a set of plural memory units, and controllably reads out data from the parallel-connected memory units and assembles the accessed data in the form of a serial output digital data stream for transmission to a requesting destination device signals at the medium data rate. Access to the high speed port is through a high data rate shift register, which is coupled to receive high speed imagery data and controllably transfers successive pixel signals, in parallel, to the input stage of each internal shift registers that are coupled to respective row access ports of the plurality of parallel-connected memory units. During high speed read out successive rows of memory data are transferred from the internal shift registers into a respective stage of the high data rate shift register, which is then serially clocked for high speed readout.

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First Claim