Circuit to selectively process dip switches onto bus lines
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United States of America Patent
Stats
-
Oct 27, 1992
Grant Date -
N/A
app pub date -
Apr 12, 1991
filing date -
Apr 12, 1991
priority date (Note) -
Expired
status (Latency Note)
Importance
Abstract
A circuit to selectively process dip switches onto bus lines in a computer or device utilizing digital logic circuits wherein the dip switches are operably connected to a changeable source of digital signals so that upon command at desired times, the output of the dip switches connected to the bus lines may be reversed. Such a circuit consists of connecting the dip switches on one side to the bus lines and the other side through a current limiting resistor to the output of a logic circuit such as a NAND gate or other circuit which constantly outputs a digital signal. The input then to this logic circuit may be changed as desired to reverse the logic circuit output and thus the output of the dip switches. If desired, in place of the NAND gate output, the current limiting resistor may be grounded or connected to digital '1' in which case a constant digital signal is outputted to the bus lines upon dip switch closure.
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