High speed testing for programmable logic devices
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United States of America Patent
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-
Oct 27, 1992
Grant Date -
N/A
app pub date -
Jul 31, 1990
filing date -
Jul 31, 1990
priority date (Note) -
Expired
status (Latency Note)
Importance
Abstract
A shift register used to shift programming and test data into a programmable logic device is modified so that each bit thereof can be directly set or reset. Control signals can be used to directly place the required test patterns into the shift register. A memory connected to the shift register, and associated logic, provides a means for testing whether data was accurately written to the array without shifting any data off of the device.
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