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Abstract

Three-dimensional semiconductor structures are taught in which various device types are formed from a plurality of planar layers on a substrate. The major process steps include the formation of a plurality of alternating layers of material, including semiconductor and dielectric materials, forming a vertical access hole in the layers, processing the layers selectively to form active or passive semiconductor devices, and filling the access hole with a conductor. The ultimate structure includes a three-dimensional memory array in which entire dynamic memory cells are fabricated in a stacked vertical orientation above support circuitry formed on a planar surface.

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First Claim