Semiconductor device and method of manufacturing the same

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United States of America Patent

PATENT NO 5160998
SERIAL NO

07780564

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Abstract

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A semiconductor device including a semiconductor substrate; a metal wiring layer formed on the semiconductor substrate; a first insulation layer formed on the metal wiring layer, the first insulation layer being formed by a tensile stress insulation layer having a contracting characteristic relative to the substrate; and a second insulation layer formed on the first insulation layer, the second insulation layer being formed by a compressive stress insulation layer having an expanding characteristic relative to the substrate. The tensile stress insulation layer is produced by thermal chemical vapor deposition or plasma assisted chemical vapor deposition which is performed in a discharge frequency range higher than 2 megahertz; and the compressive stress insulation layer is produced by plasma assisted chemical vapor deposition which is performed in a discharge frequency range lower than 2 megahertz.

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Patent Owner(s)

Patent OwnerAddress
FUJITSU MICROELECTRONICS LIMITED7-1 NISHI-SHINJUKU 2-CHOME SHINJUKU-KU TOKYO 163-0722

International Classification(s)

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Itoh, Junichi Inagi, JP 61 857
Kurita, Kazuyuki Yokohama, JP 8 105

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