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Abstract

A digital demodulating apparatus which is high in accuracy in operation and simple in construction. The digital demodulating apparatus comprises an analog to digital converter for converting an input modulated signal having a carrier frequency of fc and a band width of 2B into a digital signal with a sampling clock signal of a sampling frequency of fs, a sampling clock generating circuit for generating a clock signal of the sampling frequency fs which is defined as fc.perspectiveto.(2m+1)/4.multidot.fs and fs>4B m being an arbitrary integer, an orthogonal component extracting circuit for extracting, from an output digital signal of the analog to digital converter, two components which are different by (an odd number/2).multidot..pi. in phase from each other, and a demodulator of the digital signal processing type for receiving such two extracted components from the orthogonal component extracting circuit and producing a demodulated signal from the two received components.

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