Data processing system with cache memory addressable by virtual and physical address
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United States of America Patent
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Jan 12, 1993
Grant Date -
N/A
app pub date -
Aug 29, 1989
filing date -
Sep 30, 1988
priority date (Note) -
Expired
status (Latency Note)
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Abstract
A data processing unit accesses data in a cache using a virtual address. If the data is not in the cache, the virtual address is translated by a memory management unit (MMU) into a physical address for accessing a main memory. The MMU can also access the cache, using the physical address, to retrieve page table entries held in the cache. This avoids the need for a main memory access to retrieve the page table entries, and hence speeds up the address translation operation. The physically addressed entries in the cache are tagged with a reserved context number to distinguish them from the virtually addressed data.
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