Instruction storage and cache miss recovery in a high speed multiprocessing parallel processing apparatus
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United States of America Patent
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Jan 12, 1993
Issued Date -
N/A
app pub date -
May 30, 1991
filing date -
Apr 20, 1987
priority date (Note) -
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Abstract
A method and apparatus for storing an instruction word in a compacted form on a storage media, the instruction word having a plurality of instruction fields, features associating with each instruction word, a mask word having a length in bits at least equal to the number of instruction fields in the instruction word. Each instruction field is associated with a bit of the mask word and accordingly, using the mask word, only non-zero instruction fields need to be stored in memory. The instruction compaction method is advantageously used in a high speed cache miss engine for refilling portions of instruction cache after a cache miss occurs.
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