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Abstract

An interrupt signal for a disk array is generated by selectively combining interrupt signals received from the individual disk drives and other interrupt signal sources within the disk array. The circuit for generating the array interrupt signal includes logic for combining a first group of selected interrupt signals to generate a group interrupt signal having a HIGH state when each one of the signals in the first group is at a HIGH state, and logic which combines a second group of selected interrupt signals to generate an independent interrupt signal having a HIGH state when any one of the interrupt signals of the second group is at a HIGH state. The group and independent interrupt signals are gated together through use of an OR gate to generate the disk array interrupt signal. The logic for generating the group and independent interrupt signals can be reconfigured to combine, pass or ignore interrupt signals as selected by the system user. The circuit includes filtering and latching mechanisms to prevent interference with an existing array interrupt signal during reconfiguration of the group or independent interrupt logic.

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First Claim