Membrane probe contact bump compliancy system

Number of patents in Portfolio can not be more than 2000

United States of America Patent

PATENT NO 5180977
SERIAL NO

07801702

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ATTORNEY / AGENT: (SPONSORED)

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Abstract

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The present invention provides a membrane probe contact bump compliancy system implemented in an integrated circuit (IC) testing system to nondestructively test a wafer. This integrated circuit system includes a test controller which is capable of controlling and executing a set of test programs, a wafer dispensing system, and a probe card. Under control of the test controller, the wafer dispensing system handles and controls the wafer for the performance of said set of test program. The probe card has a performance board and a plurality of probes. In cooperation with the wafer dispensing system, the probe card positions each of the probes to engage the wafer substantially at a predefined location with a controlled amount of force. The performance board further includes a transmission line corresponding to each probe. The probes are affixed to the performance board with each probe connected to a corresponding transmission line such that each probe is in electric communication with the test controller via the performance board. The probe card further includes a probe compliancy system disposed between the performance board and the probes. The compliancy system includes at least one elastomer layer and at least one deflectable protection layer. The probe compliancy system cushions the probes in engaging the wafer and the deflectable protection layers protect the elastomeric layers.

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Patent Owner(s)

Patent OwnerAddress
SV PROBE PTE LTDSINGAPORE SINGAPORE CITY SINGAPORE 768721

International Classification(s)

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Huff, Richard E Belmont, CA 8 693

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