Vertical current flow semiconductor device utilizing wafer bonding
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United States of America Patent
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Feb 2, 1993
Grant Date -
N/A
app pub date -
May 6, 1991
filing date -
May 6, 1991
priority date (Note) -
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Abstract
An intermediate contact layer (16) is created within a vertical current flow semiconductor device such as an enhanced insulated gate bipolar transistor (EIGBT) (17). An active wafer (11) that is used for forming active elements of the device is wafer bonded to a conductor (16) that is on a surface of a substrate wafer (12). The wafer bonding not only forms the intermediate contact layer (16) but also diffuses a series of P (18) and N (19) regions into the active wafer (11) thereby forming ohmic contacts between the P (18) and N (19) regions and the intermediate contact layer (16). The substrate wafer (12) provides support for the active wafer (11) during subsequent wafer processing operations.
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