Byte-wide elasticity buffer

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United States of America Patent

PATENT NO 5185863
SERIAL NO

07444619

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Abstract

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A network station's elasticity buffer includes a memory core together with write and read pointer logic. The memory core includes a START area and a CONTINUATION area which is a cyclic buffer. Under normal conditions, the read pointer follows the write pointer cyclically in the CONTINUATION area. However, upon detection of a start delimiter or upon station reset, the pointers recenter to the START area. Separate synchronizing logic is provided for each of the two recentering modes to reduce metastability problems caused by asynchronous sampling of data. A delay-by-one mechanism is built into the start delimiter mode synchronization scheme so that, under certain conditions, the read pointer is held in the CONTINUATION area for an additional read so an early sample of the read-start signal by the station's local clock while the read pointer is well behind the write pointer will not drop the last character of the previous frame when that frame is not separated from the next start delimiter by a sufficient interframe gap. A look-ahead-look-current detector insures that the there is not too much initial separation between the write pointer and the read pointer. A delay-GO mechanism is built into the reset mode synchronization scheme to prevent irregular dropping of line state characters when the local byte clock is trapped within the metastability window while clock drift is infinitesimal. The read pointer logic also includes a mechanism for preventing the delay-GO mechanism from creating too much initial separation between the write pointer and the read pointer.

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Patent Owner(s)

Patent OwnerAddress
NATIONAL SEMICONDUCTOR CORPORATION A CORP OF DE2900 SEMICONDUCTOR DR SANTA CLARA CA 95052

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Hamstra, James R Shorewood, MN 27 937
Perloff, Ronald S Poway, CA 19 464
Yeung, Louise Y Sunnyvale, CA 7 122

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