Method for forming solder bump interconnections to a solder-plated circuit trace
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United States of America Patent
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Feb 16, 1993
Issued Date -
N/A
app pub date -
Oct 2, 1991
filing date -
Oct 2, 1991
priority date (Note) -
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Abstract
A method for attaching an integrated circuit component to a printed circuit board by a plurality of solder bump interconnections utilizes a printed circuit board comprising a solder-plated circuit trace. The trace includes terminals, each including a terminal pad and a runner section. A solder plate formed of a first solder alloy is applied to the terminal to extend continuously between the pad and the runner section. Solder bumps are affixed to the component and are formed of second compositionally distinct solder alloy having a melting temperature greater than the first alloy. The component and board are then assembled so that the bumps rest against the solder-plated terminal pads, and heated to a temperature effective to melt the solder plate but not the bump alloy. Upon cooling to resolidify the solder, the solder plate is fused to the bumps to form the interconnections.
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