Multilayer ceramic substrate for mounting of semiconductor device

Number of patents in Portfolio can not be more than 2000

United States of America Patent

PATENT NO 5196089
SERIAL NO

07751326

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ATTORNEY / AGENT: (SPONSORED)

Importance

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Abstract

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In a method of fabricating a multilayered interconnection for integrated circuit package, a coating of a metallized conductive pattern is formed on an upper surface of the substrate. A plurality of vertical copper studs are formed on the substrate for an interconnection with the metallized conductive pattern. A polyimide slurry is provided on the surface of the substrate to cover each top surface of the conductive studs. An upper surface of the polyimide slurry is polished to expose each top surface of the copper studs. A masking film is provided on each top surface of the copper studs prior to supplying an intermediate derivative of a polyimide polymer. The masking film works to protect the intermediate derivative against an chemically reaction with the copper studs to avoid a chelate compound from being produced at the time of heating step followed; A coat of the intermediate derivative of the polyimide polymer is provided entirely on the polished surface of the polyimide slurry, and is heated to form a coating of a polyimide layer. Then the coating of the polyimide layer is partly removed to expose portions corresponding to each top surface of the copper studs. The masking film is removed by etching.

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Patent Owner(s)

Patent OwnerAddressTotal Patents
NGK SPARK PLUG CO., LTD.AICHI1352

International Classification(s)

Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Imai, Ryuji Nagoya, JP 11 290
Kambe, Rokuro Nagoya, JP 9 200
Takada, Toshikatsu Nagoya, JP 12 190

Cited Art Landscape

Patent Info (Count) # Cites Year
 
INTERNATIONAL BUSINESS MACHINES CORPORATION (2)
* 4622058 Formation of a multi-layer glass-metallized structure formed on and interconnected to multi-layered-metallized ceramic substrate 63 1986
* 4970106 Thin film multilayer laminate interconnection board 31 1990
* Cited By Examiner

Patent Citation Ranking

Forward Cite Landscape

Patent Info (Count) # Cites Year
 
Other [Check patent profile for assignment information] (1)
* 5432999 Integrated circuit lamination process 117 1994
 
INTERNATIONAL BUSINESS MACHINES CORPORATION (2)
* 6022485 Method for controlled removal of material from a solid surface 2 1997
6254719 Method for controlled removal of material from a solid surface 0 1999
 
KINSUS INTERCONNECT TECHNOLOGY CORP. (3)
* 9095084 Stacked multilayer structure 0 2013
* 9095085 Method of manufacturing a stacked multilayer structure 0 2013
* 2014/0290,057 METHOD OF MANUFACTURING A STACKED MULTILAYER STRUCTURE 2 2013
 
DONGBU HITEK CO., LTD. (2)
* 8048802 Method for forming interlayer insulating film in semiconductor device 0 2008
* 2009/0057,927 METHOD FOR FORMING INTERLAYER INSULATING FILM IN SEMICONDUCTOR DEVICE 1 2008
 
HARRIS CORPORATION (1)
* 6184463 Integrated circuit package for flip chip 114 1998
 
MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD. (2)
* 5640051 Chip package, a chip carrier, a terminal electrode for a circuit substrate and a chip package-mounted complex 41 1994
* 5628919 Methods for producing a chip carrier and terminal electrode for a circuit substrate 19 1995
* Cited By Examiner