Method of fabricating an integrated circuit having active regions near a die edge
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United States of America Patent
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Mar 23, 1993
Issued Date -
N/A
app pub date -
Mar 25, 1991
filing date -
Dec 17, 1987
priority date (Note) -
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status (Latency Note)
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Abstract
The invention relates to a method of scribing and separating dice from each other after fabrication in a semiconductor wafer in a manner such that active circuit regions in the dice reside as near to an edge of a die as possible. The wafer is anistropically etched through the active layer and into the substrate through an opening in the mask to form a generally V-shaped channel with the dice then being separated along a vertex of the channel. The dice are then positioned to abut each other in the form of a mosaic.
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