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Abstract

A method and system for test data generation, reception, synchronization and analysis of multiple channels within a multiplexed data stream is described herein. Latches on the parallel inputs and outputs of the test data generation shift registers shuffle shift register values for individual channels in and out of memory at the appropriate time in the time division multiplexed (TDM) data stream. State machine control circuitry is used to generate the complex control signals. State machine control memory is a dual port memory, allowing the control signals to be modified as testing requirements vary. This allows various types of analyses for different channels within the TDM data stream simultaneously. A generator dual port memory allows analysis of different types of test data in each channel within the TDM data stream. Results are acumulated in the results dual port memeory and are accessed by a microprocessor for further processing and display.

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