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Abstract

A circuit arrangement for establishing conference connections comprising conference units is described, which units are linked to form a loop (L). In this loop (L) sum codewords consisting of sample values of the signals of all participants in a conference are transmitted from one conference unit to the next. In each conference unit a sum codeword is updated so that the sample value of a conference signal from the previous loop travel is replaced by the current sample value. In order to enable the monotoring of a travel of sum codewords through the loop with a circuit arrangement of this type and in order to have the sum codewords pass through the loop in a predetermined brief period of time without a necessity for a synchronization of individual processing modules of the conference units, the function of one or more conference units is taken over by a programmed processor (P1 to P4). The exchange of data between the conferees and the processors is controlled by means of an interface circuit (PO). In addition to the sum codewords also test words consisting of transformed sum codewords pass through the loop (L). Sum codewords and test words are buffered in input memories (ES1 to ES4) during their travel through the loop until the associated processor (P1 to P4) has finished the program modules for which the sum codeword or test word respectively is used. These modules are programmed in the individual processors (P1 to P4) in a time offset order.

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First Claim