Importance

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Abstract

A method of memory access for sharing a memory between multiple processors. The memory comprises a plurality of sections and each section is connected to each processor by a memory path. Each section includes a plurality of subsections and each subsection includes a plurality of banks which includes a plurality of individually addressable memory locations. Memory references attempting to access the individually addressable memory locations are generated by the processors. Subsection conflicts between the memory references generated by a plurality of ports of each processor are resolved so that only one of the memory references from each processor is allowed to access one of the plurality of subsections at a time. Section conflicts between the memory references generated by the plurality of ports of each processor are resolved so that only one of the plurality of ports of each processor connects by the memory path for each processor to one of the plurality of the sections at a time. Bank conflicts between particular memory references which are allowed access to one of the plurality of subsections in one of the plurality of sections are resolved so that only one memory reference accesses a particular bank in one of the plurality of subsections at a time.

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First Claim