Method for fabricating semiconductor device

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United States of America Patent

PATENT NO 5210053
SERIAL NO

07846083

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Abstract

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A method for fabricating a semiconductor device includes steps of forming wirings on the surface of a semiconductor substrate with a plurality of diffused layers; forming a first insulating film whose surface is flattened; forming a first group of contact holes having substantially the same depth reaching the diffused layers and the wirings; embedding selectively grown conductive layers in the first group of contact holes; depositing a second insulating film on the entire surface; forming , in the first insulating film and the second insulating film, a second group of contact holes having substantially the same depth reaching the other of the diffused layers and the wirings; and embedding selectively grown conductive layers in the second group of contact holes. A plurality of contact holes with different depths formed in an interlayer insulating film are grouped into two or more groups in accordance with their depth, and are filled with contact materials selectively grown by individual processes so that the surface of the contacts thus formed can be made completely flat. Thus, regardless of the thickness of the interlayer insulating film formed on a chip, stabilized wirings can be made with good coverage for the contacts so that the reliability of the completed semiconductor device can be greatly enhanced.

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Patent Owner(s)

Patent OwnerAddress
KRATON POLYMERS U S LLC16400 PARK ROW HOUSTON TX 77084

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Yamagata, Yasushi Tokyo, JP 16 229

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