Clock division chip for computer system which interfaces a slower cache memory controller to be used with a faster processor
Number of patents in Portfolio can not be more than 2000
United States of America Patent
Stats
-
May 11, 1993
Grant Date -
N/A
app pub date -
Oct 17, 1989
filing date -
Oct 17, 1989
priority date (Note) -
Expired
status (Latency Note)
Importance
Abstract
A clocking control circuit for a computer system and method for receiving a microprocessor clock signal which drives a microprocessor and for supplying a support clock signal having a lower frequency. The support clock frequency drives support interface circuitry such as a peripheral controller, a CPU/memory controller, and a bus bridge interface, and thus causes the support interface circuitry to operate at a lower frequency than the microprocessor. The clocking control circuit ensures synchronization between the support clocking signal and the microprocessor clocking signal. The transmission of control signals between the microprocessor and support interface circuitry is controlled to ensure proper communications between the microprocessor and support circuitry.
First Claim
Family
International Classification(s)
Cited Art Landscape
Patent Citation Ranking
Advertisement
Advertisement
Advertisement
Recipient Email Address
Recipient Email Address
Comment
Recipient Email Address
Add to Portfolio(s)
To add this patent to one, or more, of your portfolios, simply click the add button.
This Patent is in these Portfolios:
Add to additional portfolios:
Last Refreshed On:
Changes done successfully