Process for preparing high-Tc superconducting integrated circuits

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United States of America Patent

PATENT NO 5219830
SERIAL NO

07731050

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Abstract

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A process for preparing high-Tc superconducting integrated circuits by using a method in which a thin surface layer of non-superconducting tetragonal YBa.sub.2 Cu.sub.3 Oy wafer is selectively transformed into a superconducting orthorhombic phase by oxygen-diffusion. The superconducting orthorhombic islands are surrounded with non-superconducting tetragonal phases and these are electrically isolated from each other. The process results in the formation of superconducting integrated circuits which are inexpensive and are high in quality.

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Patent Owner(s)

  • SAMSUNG ELECTRO-MECHANICS CO., LTD.

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Jeong, Ju Y Seoul, KR 2 11
Park, Sang C Seoul, KR 6 116
Song, I H Seoul, KR 1 1
Yoon, Seok Y Seoul, KR 3 18

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