Dual ported content addressable memory cell and array

Number of patents in Portfolio can not be more than 2000

United States of America Patent

PATENT NO 5226005
SERIAL NO

07615941

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ATTORNEY / AGENT: (SPONSORED)

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Abstract

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An improved CAM (content addressable memory) cell is provided with dual address lines operable independently for a Read operation or for a Write operation. The cell is additionally provided with dual ports so that the first port permits a data input for Write operations or alternatively a data input for Search-Compare operations. The second port (Data Output) is independently connected to enable Read out of data residing in the cell. Each CAM cell also has a coincidence line (match-hit) output to indicate when an input Search bit or word coincides with resident data within the CAM cell. The CAM cells are arranged in an array of 'm' rows with each row having 'n' bits to hold a 'n' bit word. Operationally the array permits both 'Read' and 'Search-Compare' operations to be accomplished in one clock cycle rather than the usual requirement of 3-4 clock cycles.

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Patent Owner(s)

Patent OwnerAddressTotal Patents
Unisys CorporationBLUE BELL, PA1314

International Classification(s)

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  • [Patents Count]

Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Easley, Jeffery L Carlsbad, CA 2 77
Lee, David C San Diego, CA 65 1468
Malik, Ashgar K Escondido, CA 5 120

Cited Art Landscape

Patent Info (Count) # Cites Year
 
MASSACHUSETTS INSTITUTE OF TECHNOLOGY (1)
* 4831585 Four transistor cross-coupled bitline content addressable memory 23 1987
 
Other [Check patent profile for assignment information] (1)
* 4779226 Complementary high performance cam cell 31 1986
 
MITSUBISHI DENKI KABUSHIKI KAISHA (2)
* 5111427 Nonvolatile content-addressable memory and operating method therefor 72 1989
* 5130945 Content addressable memory combining match comparisons of a plurality of cells 20 1990
 
VERIZON LABORATORIES INC. (1)
* 4862412 Content-addressable memory having control circuitry and independent controls for match and write cycles 19 1988
* Cited By Examiner

Patent Citation Ranking

Forward Cite Landscape

Patent Info (Count) # Cites Year
 
INTERNATIONAL BUSINESS MACHINES CORPORATION (3)
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Other [Check patent profile for assignment information] (1)
* 6510069 Content addressable memory apparatus and method of operating the same 5 2001
 
HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP (1)
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TELEFONAKTIEBOLAGET L M ERICSSON (PUBL) (1)
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GLOBALFOUNDRIES INC. (5)
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7120732 Content addressable memory structure 5 2004
* 2005/0185,436 CONTENT ADDRESSABLE MEMORY STRUCTURE 0 2004
7337268 Content addressable memory structure 0 2006
7464217 Design structure for content addressable memory 1 2007
 
ALTERA CORPORATION (4)
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7111110 Versatile RAM for programmable logic device 12 2002
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OL SECURITY LIMITED LIABILITY COMPANY (1)
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TWITTER, INC. (1)
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INTEL CORPORATION (3)
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MITSUBISHI DENKI KABUSHIKI KAISHA (1)
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MUSIC SEMICONDUCTORS, INC. (1)
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SANDISK CORPORATION (3)
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KABUSHIKI KAISHA TOSHIBA (1)
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XYLON LLC (4)
6339539 Content addressable memory having read/write capabilities that do not interrupt continuous search cycles 27 2000
6553453 Variable width content addressable memory device for searching variable width data 28 2000
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BROADCOM CORPORATION (1)
* 6122706 Dual-port content addressable memory 7 1993
 
Unisys Corporation (2)
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NEC ELECTRONICS CORPORATION (1)
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AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD. (30)
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6240485 Method and apparatus for implementing a learn instruction in a depth cascaded content addressable memory system 55 1998
6219748 Method and apparatus for implementing a learn instruction in a content addressable memory device 49 1998
6381673 Method and apparatus for performing a read next highest priority match instruction in a content addressable memory device 35 1998
6418042 Ternary content addressable memory with compare operand selected according to mask value 40 1998
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6460112 Method and apparatus for determining a longest prefix match in a content addressable memory device 47 1999
7143231 Method and apparatus for performing packet classification for policy-based packet routing 10 1999
6539455 Method and apparatus for determining an exact match in a ternary content addressable memory device 37 1999
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7487200 Method and apparatus for performing priority encoding in a segmented classification system 5 2000
6697911 Synchronous content addressable memory 12 2001
7110407 Method and apparatus for performing priority encoding in a segmented classification system using enable signals 28 2001
7110408 Method and apparatus for selecting a most signficant priority number for a device using a partitioned priority index table 4 2001
* 6567340 Memory storage cell based array of counters 25 2001
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6944709 Content addressable memory with block-programmable mask write mode, word width and priority 38 2001
6934795 Content addressable memory with programmable word width and programmable priority 45 2001
6564289 Method and apparatus for performing a read next highest priority match instruction in a content addressable memory device 23 2001
6892272 Method and apparatus for determining a longest prefix match in a content addressable memory device 9 2002
6574702 Method and apparatus for determining an exact match in a content addressable memory device 29 2002
6678786 Timing execution of compare instructions in a synchronous content addressable memory 14 2002
6845025 Word line driver circuit for a content addressable memory 14 2003
6961810 Synchronous content addressable memory 15 2003
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* 2006/0010,284 Synchronous content addressable memory 3 2005
 
OKI SEMICONDUCTOR CO., LTD. (1)
* 5313436 Address transition detecting circuit 3 1992
* Cited By Examiner