Forming via holes in a multilevel substrate in a single step

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United States of America Patent

PATENT NO 5227013
SERIAL NO

07735572

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Abstract

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A method for forming via holes in a multilayer structure in a single step. The invention includes disposing over a base a first layer comprising first metal lines beneath a first dielectric, disposing over the first layer a second layer comprising second metal lines beneath a second dielectric such that a portion of each first metal line is not beneath any second metal line, and forming via holes which extend through the second dielectric to the second metal lines and through the second dielectric and the first dielectric to the portions of the first metal lines. Thereafter conductive metal can be deposited in the via holes. The method is particularly well suited for fabricating copper/polymer substrates.

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Patent Owner(s)

Patent OwnerAddress
SAMSUNG ELECTRONICS CO LTD129 SAMSUNG-RO YEONGTONG-GU SUWON-SI GYEONGGI-DO 16677 16677

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Kumar, Nalin Austin, TX 106 2376

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