IC chip having volatile memory cells simultaneously loaded with initialization data from uniquely associated non-volatile memory cells via switching transistors
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United States of America Patent
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Jul 20, 1993
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N/A
app pub date -
May 8, 1990
filing date -
Dec 5, 1989
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Expired
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Abstract
Initial data and/or control bits of registers within a digital integrated circuit are simultaneously loaded from localized non-volatile memory cells provided as part of the circuit. Such loading is accomplished each time the circuit is initialized, such as when power is first turned on to a system in which the circuit is a part. An important use of this technique is with a computer peripheral circuit chip such as a serial communications controller.
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