Checkpointing mechanism for fault-tolerant systems
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United States of America Patent
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Aug 10, 1993
Grant Date -
N/A
app pub date -
Jan 16, 1991
filing date -
Feb 8, 1990
priority date (Note) -
Expired
status (Latency Note)
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Abstract
A device which switches data processing from an active processor, about to fail, to a back-up processor includes a memory change detector which captures memory changes in the memory of the active processor and a mirroring control circuit which causes the memory changes when committed by establishing recovery point signals generated by the active processor to be dumped into the memory of the back-up processor so that the back-up processor resumes operation of the active processor from the last established recovery point.
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