Methods and apparatus for programming cellular programmable logic integrated circuits
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United States of America Patent
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Aug 17, 1993
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N/A
app pub date -
May 8, 1992
filing date -
May 8, 1992
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Abstract
In order to simplify the programming structure and facilitate testing of that structure, the programmable elements in a cellular programmable logic integrated circuit (such as a field programmable gate array ('FPGA') or a programmable logic device ('PLD')) are connected in one or more series with switches interposed between the elements in the series. Initially, all of the switches in each series are enabled so that the ability of the series to correctly pass data can be tested. Thereafter, the switches are progressively disabled, starting from the switch which is most remote from the data source, so that data is stored in successive programmable elements, again starting with the programmable element which is most remote from the data source.
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