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Abstract

A frame switching relay switches frames between input and output paths by multiplexing of the paths at frame cell level. A frame is divided into cells having a constant number of bits, whereas the frames are of variable length. The switching relay only retransmits frames that have been completely written in the buffer memory. A context memory preserves the address of the first cell at the start of the writing of a frame in the buffer memory, and memorizes the address of the output path for which the frame is destined, until the frame is completely written. A checking circuit checks that the writing of the frame does not cause an 'overflow' in the buffer memory, by updating the number of cells awaiting reading and respectively associated with the output paths. If there is no overflow, the address of the first cell of the frame is written in one of the address queues as a function of the destination output path address. The frame is subsequently read by incrementation of the address of the first cell until the end of the frame is detected.

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First Claim