Nonvolatile microprocessor with predetermined state on power-down
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United States of America Patent
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Aug 17, 1993
Issued Date -
N/A
app pub date -
May 8, 1992
filing date -
Aug 31, 1988
priority date (Note) -
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Abstract
A battery-backed microprocessor which enters a known state on power-down. This is achieved, even if the microprocessor does not permit a single-cycle reset, by providing clock intercept circuitry on chip. When system power failure is detected, the clock intercept circuitry disconnects the external clock, activates a reset command, and then generates several clock cycles using an internal clock generator after the reset command. As many clock cycles are generated as is needed, with the particular architecture being used, to reach a predetermined state.
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