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Abstract

A processor suitable for recursive computations is arranged to multiply successive input data words by a co-efficient word to produce results. It incorporates multiplier cells connected to form rows and columns. Each row is arranged to multiply a respective input data digit by the co-efficient. It begins with accumulator cells and continues with multiplier cells each arranged to multiply by an individual co-efficient digit and disposed in the row in descending order of digit significance. Columns other than the first column begin with a multiplier cell, and the higher significance columns terminate at respective accumulator cells. Any intervening multiplier cells are arranged in ascending order of multiplier digit significance. The processor employs radix 2 arithmetic. Each accumulator cell employs redundant radix 2 arithmetic, and each adds the highest significance transfer digit output of its row to at least three digits of equal and higher significance output from a preceding row. Operation of the multiplier and accumulator cells generates sum and transfer digits for output down and between columns in the direction of increasing digit significance in the case of transfer digits. An accumulator cell's computed digit of higher significance becomes the respective row's output result digit. Each result digit is recycled in redundant radix 2 form to provide an input data digit for all multiplier cells of a respective row selected in accordance with result digit significance.

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