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Abstract

A differential amplifier circuit includes a differential amplifier responsive to an input differential voltage signal and implemented by a parallel combination of first and second bipolar transistors associated with a first constant current source, a pair of interconnections coupled with the collector nodes of the first and second bipolar transistors, a current-to-voltage converter having a series combination of a resistor and a third bipolar transistor associated with the first bipolar transistor and a series combination of a resistor and a fourth bipolar transistor associated with the second bipolar transistor, and a standby current source coupled between the third and fourth bipolar transistors and a ground voltage line, and branch currents from the first and second bipolar transistors are inversely proportional to branch currents from the third and fourth bipolar transistors to the standby current source so that the third and fourth bipolar transistors drive the pair of interconnections at high speed without sacrifice of current consumption.

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First Claim