Flash memory blocking architecture
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United States of America Patent
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Sep 28, 1993
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N/A
app pub date -
Feb 11, 1991
filing date -
Feb 11, 1991
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Abstract
A blocking architecture for use in non-volatile semiconductor memories is disclosed. This architecture minimizes device area taken up by signal lines while maximizing device yield. Additionally, this architecture minimizes the Y decoding mechanism while maximizing device performance.
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