Method of manufacturing semiconductor devices

Number of patents in Portfolio can not be more than 2000

United States of America Patent

PATENT NO 5250465
SERIAL NO

07825255

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Abstract

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A semiconductor device having small diameter via-holes, particularly not greater than 0.6 microns, for a multilayer interconnection is produced by a method comprising covering an interlayer film and via-holes with a continuous, first metal film by a CVD process, and heating and melting by an irradiation of an energy beam a second metal film deposited on the first film by a PVD process, together with the first metal film, to fully fill the via-holes with the material from the outside of the holes, to thus form conductive plugs therein. The deposition of the material of the second metal film and the filling of the via-holes may be simultaneously performed by a high temperature sputtering process.

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Patent Owner(s)

Patent OwnerAddress
FUJITSU SEMICONDUCTOR LIMITED2-10-23 SHIN-YOKOHAMA KOHOKU-KU YOKOHAMA-SHI KANAGAWA 222-0033

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Iizuka, Masako Kawasaki, JP 1 32
Mukai, Ryoichi Kawasaki, JP 42 631
Nakano, Motoo Kawasaki, JP 28 521

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