Switching system with time-stamped packet distribution input stage and packet sequencing output stage
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United States of America Patent
Stats
-
Oct 12, 1993
Grant Date -
N/A
app pub date -
Jan 8, 1992
filing date -
Jan 8, 1991
priority date (Note) -
In Force
status (Latency Note)
Importance
Abstract
In a fast packet switching system, packet distributors are associated respectively with input ports for receiving successive packets therefrom and attaching a timeslot number to each of the received packets, and uniformly distributing the packets to output terminals of each distributor. Packet switches are provided corresponding in number to the output terminals of each packet distributor. Each packet switch has input terminals corresponding in number to the packet distributors and output terminals corresponding in number to the output ports. The input terminals of each packet switch are coupled to respective output terminals of the distributors for switching a packet from one of its input terminals to one of its output terminals in accordance with a destination address contained in the packet. Packet sequencers are associated respectively with the output ports. Each packet sequencer has input terminals coupled to respective output terminals of the packet switches for examining the timeslot numbers attached to packets from its input terminals and delivering the packets to the associated output port in accordance with the examined timeslot numbers.
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