Electrochemical planarization
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United States of America Patent
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Oct 26, 1993
Grant Date -
N/A
app pub date -
May 8, 1989
filing date -
May 8, 1989
priority date (Note) -
Expired
status (Latency Note)
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Abstract
In a process for fabricating planarized thin film metal interconnects for integrated circuit structures, a planarized metal layer is etched back to the underlying dielectric layer by electropolishing, ion milling or other procedure. Electropolishing reduces processing time from hours to minutes and allows batch processing of multiple wafers. The etched back planarized thin film interconnect is flush with the dielectric layer.
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