Floating point and integer number conversions in a floating point adder

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United States of America Patent

PATENT NO 5257215
SERIAL NO

07860987

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Abstract

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A floating point number which includes a mantissa field, an exponent field, and a sign field is converted to an integer of n-bit size including a sign bit. The sign field is examined to determine if the floating point number is a positive or negative number. The mantissa field is shifted right to thereby denormalize the mantissa resulting in a shifted mantissa. If the floating point number is a negative number, zero is subtracted from the shifted mantissa to produce a result mantissa field that is a two's complement number. Otherwise, zero is added to the shifted mantissa to produce a result mantissa field. Overflow or underflow of the result mantissa field with respect to the integer of n-bit size is detected and the sign bit is set appropriately to reflect the fact that the sign field of the floating point number is a negative or positive number.

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Patent Owner(s)

Patent OwnerAddress
INTEL CORPORATION2200 MISSION COLLEGE BLVD SANTA CLARA CA 95054

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Poon, Jack T Fremont, CA 3 162

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