Importance

Loading Importance Indicators...

Abstract

The present invention comprises a method to program programmable structures in integrated circuits, such as programmable read-only memory (PROM), erasable programmable read-only memory family (EPROMS, EEPROMS, etc.) or option selections/redundancy repair on dynamic random access memories (DRAMs) by utilizing multiple programming pulses that vary in pulse width and amplitude. Multiple programming pulses (or a pulse train) of the present invention are applied to the desired structure to be programmed, whether that structure be a fuse in a bipolar PROM, an antifuse element in a CMOS PROM, an option selecting element (fuse or antifuse) in a DRAM, the programmable gates of the EPROM family (EEPROMs, Flash EEPROMS, etc.). The pulse train applied to the programmable structure may be as few as one pulse, having sufficient amplitude and pulse width, or the pulse train may be a plurality of pulses varying in pulse amplitude or pulse width. The amplitude of the programming pulse(s) may also be ramped up or down and a multiple pulse train may consists of a series of pulses wherein the first pulse may have a longer pulse width than a subsequent pulse. By adding these variables to the programming pulse train, optimal programming results can be obtained for each programmable structure.

Loading the Abstract Image...

First Claim