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Abstract

A disk array controller providing a variable configuration data path between the host system and the individual disk drives within a disk array and parity and error correcting code generation and checking. The controller includes host interface logic for converting data received from the host system via a 16 or 32-bit SCSI bus to 16, 32 or 64-bit data words multiplexed across one, two or four 16-bit buffer busses, and for converting data received from the buffer busses to the proper form for transmission to the host system. A bus switch, including an exclusive-OR circuit for generating parity information, is connected between the buffer busses and six disk drive busses for directing the transfer of data and parity information between selected buffer and drive busses. The controller further includes a storage buffer connected to the buffer busses to provide temporary storage of data and parity information. The host interface logic, bus switch and storage buffer, under the direction of an included processor and DMA control logic, performs array read and write operations requested by the host system in accordance with RAID level 1, 3, 4 or 5 protocols.

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First Claim