US Patent No: 5,264,061

Number of patents in Portfolio can not be more than 2000

Method of forming a three-dimensional printed circuit assembly

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Importance

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Abstract

A three-dimensional printed circuit assembly is formed by first making a substrate (20). A substrate (20) is first formed from a photoactive polymer (14) that is capable of altering its physical state when exposed to a radiant beam (30). At this point, the substrate is only partially cured. A conductive circuit pattern (50) is then formed on the partially cured substrate. The substrate is then molded to create a three-dimensional structure, and then further cured to cause the photoactive polymer to harden.

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First Claim

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Patent Owner(s)

Patent OwnerAddressTotal Patents
MOTOROLA, INC.SCHAUMBURG, IL7099

International Classification(s)

Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Dorinski, Dale W Coral Springs, FL 25 889
Juskey, Frank J Apopka, FL 29 1905
Suppelsa, Anthony B Coral Springs, FL 39 1559

Cited Art

Patent Info (Count) # Cites Year
 
3D SYSTEMS, INC. (3)
4,996,010 Methods and apparatus for production of three-dimensional objects by stereolithography 47 1988
4,999,143 Methods and apparatus for production of three-dimensional objects by stereolithography 75 1988
4,929,402 Method for production of three-dimensional objects by stereolithography 120 1989
 
MOTOROLA, INC. (1)
5,173,220 Method of manufacturing a three-dimensional plastic article 135 1991
 
SIEMENS AKTIENGESELLSCHAFT (1)
5,008,496 Three-dimensional printed circuit board 48 1989

Patent Citation Ranking

Forward Cites

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MICRON TECHNOLOGY, INC. (101)
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7,557,452 Reinforced, self-aligning conductive structures for semiconductor device components and methods for fabricating same 4 2000
7,138,653 Structures for stabilizing semiconductor devices relative to test substrates and methods for fabricating the stabilizers 2 2000
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6,537,482 Underfill and encapsulation of carrier substrate-mounted flip-chip components using stereolithography 31 2000
6,482,576 Surface smoothing of stereolithographically formed 3-D objects 36 2000
6,544,465 Method for forming three dimensional structures from liquid with improved surface finish 14 2000
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6,468,891 Stereolithographically fabricated conductive elements, semiconductor device components and assemblies including such conductive elements, and methods 35 2001
6,630,730 Semiconductor device assemblies including interposers with dams protruding therefrom 35 2001
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6,562,661 Tape stiffener, semiconductor device component assemblies including same, and stereolithographic methods for fabricating same 16 2001
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6,833,627 Underfill and encapsulation of carrier substrate-mounted flip-chip components using stereolithography 11 2002
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6,980,014 Interposer and methods for fabricating same 1 2003
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6,881,607 Underfill and encapsulation of carrier substrate-mounted flip-chip components using stereolithography 6 2003
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6,882,049 Support ring for use with a contact pad and semiconductor device components including the same 3 2003
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6,780,744 Stereolithographic methods for securing conductive elements to contacts of semiconductor device components 8 2003
6,963,127 Protective structures for bond wires 6 2003
7,239,015 Heat sinks including nonlinear passageways 0 2003
7,093,358 Method for fabricating an interposer 23 2003
7,115,981 Semiconductor device assemblies including interposers with dams protruding therefrom 3 2003
6,875,632 Underfill and encapsulation of carrier substrate-mounted flip-chip components using stereolithography 1 2003
6,900,078 Tape stiffener, semiconductor device component assemblies including same, and stereolithographic methods for fabricating same 1 2003
7,041,532 Methods for fabricating interposers including upwardly protruding dams 3 2004
7,094,117 Electrical contacts with dielectric cores 1 2004
7,029,954 Tape stiffener, semiconductor device component assemblies including same, and stereolithographic methods for fabricating same 2 2004
7,547,978 Underfill and encapsulation of semiconductor assemblies with materials having differing properties 2 2004
7,137,193 Programmed material consolidation methods for fabricating printed circuit board 0 2004
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6,951,779 Stereolithographic methods for fabricating hermetic semiconductor device packages and semiconductor devices including stereolithographically fabricated hermetic packages 1 2004
6,992,398 Underfill and encapsulation of carrier substrate-mounted flip-chip components 3 2004
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7,205,654 Programmed material consolidation methods for fabricating heat sinks 0 2005
7,166,925 Semiconductor devices having stereolithographically fabricated protective layers thereon through which contact pads are exposed and assemblies including the same 1 2005
7,170,171 Support ring for use with a contact pad and semiconductor device components including the same 2 2005
7,095,106 Collars, support structures, and forms for protruding conductive structures 0 2005
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