Circuitry and method for discharging a drain of a cell of a non-volatile semiconductor memory
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United States of America Patent
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Nov 23, 1993
Grant Date -
N/A
app pub date -
May 10, 1991
filing date -
May 10, 1991
priority date (Note) -
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Abstract
Circuitry for discharging a drain of a cell of a non-volatile semiconductor memory is described. A discharge transistor is coupled between (1) the drain of the cell and (2) ground for selectably (a) providing a discharge paths to ground for the drain of the cell when the discharge transistor is enabled and (b) not providing a discharge path to ground for the drain of the cell when the discharge transistor is not enabled. Circuitry is coupled to the discharge transistor for enabling the discharge transistor for a duration that both begins and ends (1) after a first operation is performed with respect to the cell and (2) before a verify operation is performed with respect to the cell.
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