Digital signal processing address sequencer
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United States of America Patent
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-
Nov 23, 1993
Grant Date -
N/A
app pub date -
Feb 21, 1990
filing date -
Feb 21, 1990
priority date (Note) -
Expired
status (Latency Note)
Importance
Abstract
A sequencer including input structure for receiving and retaining sequential data which includes the sequence starting address, the number of blocks in the sequence, the number of words in a block, increment between blocks and increment between words, includes an adder connected between the input structure and an output device and includes a controller for selectively providing to the adders inputs one or more of the sequence starting address, increment between words, increment between blocks and the output of the output device as a function of the number of blocks in the sequence and the number of words in a block.
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