Importance

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Abstract

An integrated bus structure forms a multi-bit, parallel electrical signal bus between a plurality of integrated circuit dies. In one embodiment, the integrated circuit dies are disposed in a spaced, parallel arrangement and have terminal pads mounted at peripheral edges thereof and disposed in a predetermined positional and functional relationship. Electrical conductors interconnect the same positionally arranged terminal pad on each of the plurality of integrated circuit dies to form a parallel, multi-bit, bus arrangement. In another embodiment, at least one integrated circuit is mounted on a support member. The mounting pads on each integrated circuit die are electrically connected to terminal pads formed on the peripheral edge of each support member. Electrical conductors interconnect the same positionally arranged terminal pad on each of a plurality of support members to interconnect the integrated circuit dies on each support member in a parallel bus arrangement.

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First Claim