Low temperature method for forming solder bump interconnections to a plated circuit trace
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United States of America Patent
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-
Dec 14, 1993
Issued Date -
N/A
app pub date -
Oct 8, 1992
filing date -
Apr 2, 1992
priority date (Note) -
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status (Latency Note)
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Abstract
An integrated circuit component is attached to a printed circuit board by solder bump interconnections that are formed between metal bumps on the component and a metal-plated terminal on the board. The metal plate overlies both a bond pad and an adjacent runner of each terminal and is formed of a first metal, which is preferably a tin-base alloy. The metal bumps on the component are formed of a second metal, which is preferably an indium-base alloy. The component and board are assembled and heated to a temperature less than the melting temperatures of the first and second metals. At the interface between the bumps and the plate, the first and second metals cooperate to form a liquid phase which, upon cooling and solidifying, completes the interconnection.
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