Electro-static discharge protection circuit with bimodal resistance characteristics
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United States of America Patent
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Dec 14, 1993
Issued Date -
N/A
app pub date -
May 30, 1991
filing date -
May 12, 1989
priority date (Note) -
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Abstract
An electrostatic discharge protection circuit employing an extended resistive structure having bimodal resistance characteristics in series with an input/output buffer circuit and an input/output electrical contact pad on an integrated circuit. The extended resistive structure is integrally formed with the device or devices in the buffer circuit most susceptible to damage due to ESD breakdown effects In a first resistance mode during normal circuit operations, the resistor has a low resistance value and introduces virtually no additional load to the input/output buffer circuitry. In a second mode of operation during ESD discharge, the resistor has a second significantly higher resistance which reduces current values during the ESD event thereby protecting the buffer circuit. Thick oxide snap-back device is also employed to provide a parallel ESD discharge path with low power dissipation.
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