Method for optimum erasing of EEPROM
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United States of America Patent
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Dec 14, 1993
Grant Date -
N/A
app pub date -
Mar 15, 1991
filing date -
Mar 15, 1991
priority date (Note) -
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Abstract
Various optimizing techniques are used for erasing semiconductor electrically erasable programmable read only memories (EEPROM). An erase algorithm accomplishes erasing of a group of memory cells by application of incremental erase pulses. Techniques include a 2-phase verification process interleaving between pulse applications; special handling of a sample of cells within each erasable unit group; defects handling; adaptive initial erasing voltages; and single-and hybrid-phase algorithms with sector to sector estimation of erase characteristics by table lookup. Techniques are also employed for controlling the uniformity of program/erase cycling of cells in each erasable unit group. Defects handling includes an adaptive data encoding scheme.
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