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Abstract

The method of forming an integrated circuit field effect transistor having a gate electrode, source and drain elements with buried contacts to a silicon substrate. A gate silicon oxide layer is formed on the silicon substrate. An in-situ doped layer of polysilicon is formed over the gate silicon oxide layer. An opening is formed in the doped polysilicon layer and the silicon oxide layer to the silicon substrate at the location of the buried contacts. A layer of undoped polysilicon is deposited over the doped polysilicon layer and in the opening to the silicon substrate. Doping by ion implantation of the undoped polysilicon layer is done to form a doped polysilicon gate electrode/buried contact layer. The polysilicon gate electrode/buried contact layer is patterning and etching to form the gate electrode of said transistor and buried contact layer. The source and drain regions are implanted using said polysilicon gate electrode pattern as a mask. The structure is heated to form the buried contact to at least one of the source and drain regions. Alternatively, a contact to an existing device region within the substrate may be contacted using a similar multiple layer polysilicon method.

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