US Patent No: 5,273,938

Number of patents in Portfolio can not be more than 2000

Method for attaching conductive traces to plural, stacked, encapsulated semiconductor die using a removable transfer film

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Abstract

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A low cost manufacturing method is used to fabricate a small multichip semiconductor device (30). In one embodiment, a pattern of conductive traces (13) is formed on a film of transfer material (12). A first semiconductor die (15) is interconnected to the traces and a resin body (20) is formed around the first die and one side of the traces. The film of transfer material forms, at this stage of the process, one side of the first package. The film of transfer material is then peeled from the pattern of conductive traces and the first resin body to expose the other side of the traces. A second semiconductor die (23) is interconnected to the exposed side of the traces. A second resin body (25) is formed around the second die and portions of the exposed traces. Solder balls (26) are coupled to the exposed portions of the traces to establish external electrical connections to each die.

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First Claim

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Patent Owner(s)

Patent OwnerAddressTotal Patents
FREESCALE SEMICONDUCTOR, INC.AUSTIN, TX7637

International Classification(s)

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  • [Patents Count]

Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Lin, Paul T Dallas, TX 48 4635
McShane, Michael B Austin, TX 49 3796

Cited Art Landscape

Patent Info (Count) # Cites Year
 
Compagnie Industrielle des Telecommunications Cit-Alcatel (1)
4,530,152 Method for encapsulating semiconductor components using temporary substrates 288 1983
 
GAO Gesellschaft fur Automation und Organisation mbH (1)
4,460,825 Carrier element for an IC module 50 1981
 
HITACHI MAXELL, LTD. (1)
4,961,105 Arrangement of a semiconductor device for use in a card 52 1989
 
INTERNATIONAL BUSINESS MACHINES CORPORATION (1)
4,830,264 Method of forming solder terminals for a pinless ceramic module 130 1987
 
KABUSHIKI KAISHA TOSHIBA (1)
4,635,356 Method of manufacturing a circuit module 34 1985
 
MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD. (1)
5,122,860 Integrated circuit device and manufacturing method thereof 163 1990

Patent Citation Ranking

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Patent Info (Count) # Cites Year
 
AMKOR TECHNOLOGY, INC. (181)
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6,395,578 Semiconductor package and method for fabricating the same 220 2000
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6,965,159 Reinforced lead-frame assembly for interconnecting circuits within a circuit module 4 2003
6,750,545 Semiconductor package capable of die stacking 16 2003
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6,803,254 Wire bonding method for a semiconductor package 6 2003
7,095,103 Leadframe based memory card 0 2003
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7,008,825 Leadframe strip having enhanced testability 37 2003
6,876,068 Semiconductor package with increased number of input and output pins 58 2003
6,897,550 Fully-molded leadframe stand-off feature 4 2003
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6,873,041 Power semiconductor package with strap 19 2003
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7,057,280 Leadframe having lead locks to secure leads to encapsulant 6 2003
6,998,702 Front edge chamfer feature for fully-molded memory cards 8 2003
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7,067,908 Semiconductor package having improved adhesiveness and ground bonding 5 2004
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7,214,326 Increased capacity leadframe and semiconductor package using the same 5 2005
7,247,523 Two-sided wafer escape package 23 2005
6,995,459 Semiconductor package with increased number of input and output pins 67 2005
7,192,807 Wafer level package and fabrication method 28 2005
7,211,900 Thin semiconductor package including stacked dies 8 2005
7,045,883 Thermally enhanced chip scale lead on chip semiconductor package and method of making same 8 2005
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7,361,533 Stacked embedded leadframe 32 2005
7,572,681 Embedded electronic component package 33 2005
7,112,474 Method of making an integrated circuit package 2 2005
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8,410,585 Leadframe and semiconductor package made using the leadframe 2 2006
7,535,085 Semiconductor package having improved adhesiveness and ground bonding 2 2006
7,902,660 Substrate for semiconductor device and manufacturing method thereof 45 2006
7,968,998 Side leaded, bottom exposed pad and bottom exposed lead fusion quad flat semiconductor package 6 2006
7,321,162 Semiconductor package having reduced thickness 2 2006
7,332,375 Method of making an integrated circuit package 2 2006
7,521,294 Lead frame for semiconductor package 6 2006
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7,687,893 Semiconductor package having leadframe with exposed anchor pads 9 2006
7,829,990 Stackable semiconductor package including laminate interposer 2 2007
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7,420,272 Two-sided wafer escape package 24 2007
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7,977,774 Fusion quad flat semiconductor package 6 2007
7,687,899 Dual laminate package structure with embedded elements 8 2007
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7,982,298 Package in package semiconductor device 2 2008
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7,960,818 Conformal shield on punch QFN semiconductor package 1 2009
7,928,542 Lead frame for semiconductor package 2 2009
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7,977,163 Embedded electronic component package fabrication method 7 2009
8,796,561 Fan out build up substrate stackable package and method 0 2009
8,089,141 Semiconductor package having leadframe with exposed anchor pads 0 2010
7,872,343 Dual laminate package structure with embedded elements 3 2010
8,188,584 Direct-write wafer level chip scale package 6 2010
7,932,595 Electronic component package comprising fan-out traces 10 2010
8,324,511 Through via nub reveal method and structure 1 2010
7,906,855 Stacked semiconductor package and method of making same 2 2010
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8,390,130 Through via recessed reveal structure and method 1 2011
8,318,287 Integrated circuit package and method of making the same 4 2011
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8,119,455 Wafer level package fabrication method 5 2011
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8,298,866 Wafer level package and fabrication method 3 2012
8,501,543 Direct-write wafer level chip scale package 1 2012
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TESSERA, INC. (19)
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FREESCALE SEMICONDUCTOR, INC. (7)
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5,894,108 Plastic package with exposed die 277 1997
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NEC ELECTRONICS CORPORATION (1)
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6,423,102 Jig used for assembling semiconductor devices 9 1997
 
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5,866,475 Method of forming solder bumps 8 1997
 
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