Data transfer using bus address lines
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United States of America Patent
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-
Dec 28, 1993
Issued Date -
N/A
app pub date -
Nov 13, 1991
filing date -
Jan 13, 1989
priority date (Note) -
Expired
status (Latency Note)
Importance
Abstract
A computer system can transfer data between a master subsystem and a slave subsystem on bus address lines as well as bus data lines during a high speed data transfer. Data is clocked during the high speed transfer by a high speed clock signal which is separate from a normal bus clock signal. Data is transferred at the maximum rate which can be handled by both the master subsystem and the slave subsystem.
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