Test circuit for imaging sensing integrated circuits
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United States of America Patent
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Jan 4, 1994
Grant Date -
N/A
app pub date -
Apr 23, 1992
filing date -
Sep 23, 1989
priority date (Note) -
Expired
status (Latency Note)
Importance
Abstract
The design and testing of integrated circuits in wafer form for production faults, in the absence of irradiation, is described. This is achieved by fabricating test circuits on each wafer at the periphery of the sensor array. In a preferred arrangement, two test circuits are fabricated on each wafer; one for testing the word lines and the other for testing the bit lines and individual sensing sites. The test circuits are controlled by external signals to input predetermined patterns of data to the array and the array output patterns are compared with the input patterns to assess the level of production faults.
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