Shared two level cache including apparatus for maintaining storage consistency
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United States of America Patent
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Jan 4, 1994
Issued Date -
N/A
app pub date -
Aug 20, 1991
filing date -
Jun 28, 1988
priority date (Note) -
Expired
status (Latency Note)
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Abstract
A multilevel cache buffer for a multiprocessor system in which each processor has a level one cache storage unit which interfaces with a level two cache unit and main storage unit shared by all processors. The multiprocessors share the level two cache according to a priority algorithm. When data in the level two cache is updated, corresponding data in level one caches is invalidated until it is updated.
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