Reed-Solomon code system employing k-bit serial techniques for encoding and burst error trapping

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United States of America Patent

PATENT NO 5280488
SERIAL NO

07612430

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Abstract

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Apparatus and methods are disclosed for providing an improved system for encoding and decoding of Reed-Solomon and related codes. The system employs a k-bit-serial shift register for encoding and residue generation. For decoding, a residue is generated as data is read. Single-burst errors are corrected in real time by a k-bit-serial burst trapping decoder that operates on this residue. Error cases greater than a single burst are corrected with a non-real-time firmware decoder, which retrieves the residue and converts it to a remainder, then converts the remainder to syndromes, and then attempts to compute error locations and values from the syndromes. In the preferred embodiment, a new low-order first, k-bit-serial, finite field constant multiplier is employed within the burst trapping circuit. Also, code symbol sizes are supported that need not equal the information byte size. The implementor of the methods disclosed may choose time-efficient or space-efficient firmware for multiple-burst correction.

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Patent Owner(s)

  • CIRRUS LOGIC, INC.;CIRRUS LOGIC INTERNATIONAL (UK) LIMITED

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Dudley, Trent 5348 S. Fox St. #101, Littleton, CO 80120 22 622
Glover, Neal 70 Garden Center #209, Broomfield, CO 80020 48 1992

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